This invention refers to phase lock loop circuits and in particular to phase lock loop circuits that include an apparatus and method for indicating when a phase lock loop is in a locked position.
Phase lock loops operate at frequencies from hertz to gigahertz. Determining that a phase lock loop is actually locked to an input frequency can be difficult. Normally, expensive laboratory equipment can verify that the voltage controlled oscillator part of the phase lock loop output spectrum and operating conditions are being met.
A compact simple circuit is often required for inclusion in a phase lock loop circuit to indicate the lock state of the phase lock loop. A common technique for the lock detection is illustrated in FIG. 1. The input frequency is applied to phase lock loop at a power splitter 1 which divides the input signals to two inphase signals. A first loop phase detector 3 compares the output of a Voltage Controlled Oscillator (VOC) 5 after the output signal is divided by a quadrature power splitter 7 and based on this comparison applies a correction signal via loop filter 8 to adjust the output frequency of the VCO 5. The quadrature power splitter 7 also provides a phase quadrature signal to a quadrature detector 9 which mixes the inphase signal from the output of the power splitter 1 with the 90 degree phase quadrature output signal of the voltage controlled oscillator 5. Under a lock condition, the output of the loop phase detector 3 which is the product of the input frequency times the 0 degree phase shift output of the voltage controlled oscillator 5 is 0. However, because of the 90 degree phase shift that is provided by the quadrature phase splitter 7, the quadrature detector 9 has a DC voltage output. This voltage is filtered by a low pass filter 11 and then applied to a comparator 13 which gives an output signal indicating the phase lock loop is in a locked condition.
The phase locked loop circuit in FIG. 1 requires an additional power splitter 7 and the quadrature detector 9. At very high frequencies, such as in the microwave frequency range, the manufacturing tolerances required for these components make the embodiment of FIG. 1 difficult to reproduce and extremely expensive. Because these hybrid components must operate at the phase locked loop operating frequency, they consume valuable space when the phase locked loop circuit is implemented using microchip components and/or application technology.